1. Field of the Invention
The present invention is related to dual substrate stage, double exposure lithography systems.
2. Background Art
Lithography is a process used to create features on the surface of substrates. Such substrates can include those used in the manufacture of flat panel displays, circuit boards, various integrated circuits, and the like. A frequently used substrate for such applications is a semiconductor wafer. While this description is written in terms of a semiconductor wafer for illustrative purposes, one skilled in the art would recognize that this description also applies to other types of substrates known to those skilled in the art. During lithography, a wafer, which is disposed on a wafer stage, is exposed to an image projected onto the surface of the wafer by exposure optics located within a lithography apparatus. While exposure optics are used in the case of photolithography, a different type of exposure apparatus can be used depending on the particular application. For example, x-ray, ion, electron, or photon lithographies each can require a different exposure apparatus, as is known to those skilled in the art. The particular example of photolithography is discussed here for illustrative purposes only.
The projected image produces changes in the characteristics of a layer, for example photoresist, deposited on the surface of the wafer. These changes correspond to the features projected onto the wafer during exposure. Subsequent to exposure, the layer can be etched to produce a patterned layer. The pattern corresponds to those features projected onto the wafer during exposure. This patterned layer is then used to remove or further process exposed portions of underlying structural layers within the wafer, such as conductive, semiconductive, or insulative layers. This process is then repeated, together with other steps, until the desired features have been formed on the surface, or in various layers, of the wafer.
Step-and-scan technology works in conjunction with a projection optics system that has a narrow imaging slot. Rather than expose the entire wafer at one time, individual fields are scanned onto the wafer one at a time. Moving the wafer and reticle simultaneously such that the imaging slot is moved across the field during the scan does this. The wafer stage must then be asynchronously stepped between field exposures to allow multiple copies of the reticle pattern to be exposed over the wafer surface. In this manner, the quality of the image projected onto the wafer is maximized.
Conventional lithographic systems and methods form images on a semiconductor wafer. The system typically has a lithographic chamber that is designed to contain an apparatus that performs the process of image formation on the semiconductor wafer. The chamber can be designed to have different grades of vacuum depending on the wavelength of light being used. A reticle is positioned inside the chamber. A beam of light is passed from an illumination source (located outside the system) through an optical system, through an image outline on the reticle, and a second optical system before interacting with a semiconductor wafer.
The reticle can be placed on a platform or stage (hereinafter, both are referred to as “stage”). The stage can be positioned according to parameters of the lithographic system. Similarly, the semiconductor wafer can be placed on a stage. The stage supporting either the reticle or the semiconductor wafer can be moved one or more directions and/or one or more degrees of freedom depending on how the image is to be formed on the semiconductor wafer.
In order to increase throughput, dual wafer stage systems have been developed. Typically, these dual stages can hold and independently control the motion of two wafers at the same time. Throughput is increased by allowing exposure of an aligned wafer on one chuck, while at the same time the second chuck is used to unload the previously exposed wafer, and then load and align the next unexposed wafer. Without the dual wafer stage these operations would have to be done sequentially.
In order to increase resolution, depth of focus, and process latitude the use of phase reticles has been introduced. Phase reticles often require the exposure of not only the phase reticle, but the additional aligned exposure of a second trimming reticle to achieve the desired result. Thus each field must be exposed twice first with the phase reticle, and then again with the trim reticle, usually under different conditions of illumination.
The most common method of executing this double exposure sequence is to load the phase reticle (referred to as “A”), expose an entire wafer, load the trim reticle (referred to as “B”), and then re-expose the wafer. The wafer is then removed from the wafer stage, and the next wafer is loaded. Repeating this process on a number of wafers results in an “AB AB AB” sequence of exposures where both reticle A and reticle B are exposed on each wafer. Each blank space in the sequence represents the unloading of an exposed wafer and the loading and alignment of the next unexposed wafer.
Usually the order of exposure is not critical, so that an “AB BA AB BA” exposure sequence can be used resulting in only one reticle swap for each wafer exposed rather than two for “AB AB AB.” The number of reticle exchanges can be reduced by sequencing multiple wafers through system, and then swapping reticles, but then each wafer must be handled twice, and the increased time delay between double exposures can cause process problems.
A second reason for exposing two or more reticles on a wafer is to manufacture different devices or a combination of product and test devices on each wafer. In this case, no double exposures of the same wafer area are needed.
In some cases, the device being manufactured is small enough so that it is possible to fit both the pattern from A and the pattern from B side by side on one reticle, but this is not generally practical. Also the use of a reticle stage that can carry and expose two reticles is possible, but in general rejected to avoid the reduced performance, and added cost that use of such a design may impose.
Therefore, there is a need for a system and method that increases throughput in a dual substrate stage, double exposure lithography system.